Target devices such as field programmable gate arrays (FPGAs), structured application specific integrated circuits (ASICs), ASICs, and other programmable circuits are used to implement large systems that may include million of gates and megabits of embedded memory. The complexity of a large system often requires the use of electronic design automation (EDA) tools to create and optimize a design for the system onto physical target devices. Among the procedures performed by EDA tools in a computer aided design (CAD) compilation flow are hardware description language (HDL) creation for a system and synthesis, placement, and routing of the system on the target device.
Often times, designers wish to implement a plurality of periphery devices on a target device. Periphery devices reside near the edge of the target device at the input output periphery and utilize input output elements to transmit and receive signals from components external to the target device. Exemplary periphery devices at the input output periphery of a target device may include memory controllers, direct memory access (DMA) controllers, universal asynchronous receiver/transmitters (UARTs), bus controllers, and other devices.
Many periphery devices utilize components that require a large amount of space. This poses a challenge to system designers and EDA tools when having to work with a limited amount of space at the periphery of the target device.